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ic layout design meaning in Chinese

集成电路布图设计

Examples

  1. Adopts vdsm process technology however two outstanding problems are faced to ic layout design when the feature size reaches to 0 . 18 m or lower : 1 . timing convergence problem seriously affects the circuits schedule , and the interconnect - delay has exceeded more than 70 % of the total circuits ’ delay . 2 . si problem , usually it consists two aspects of ir - drop and crosstalk . these problems often affect the chip function after tapout
    本篇论文就是针对超深亚微米阶段soc芯片后端设计所面临的挑战,提出了运用连续收敛的布局布线策略,尤其是虚拟原型的设计理论,来快速验证布局,进而提高布线的成功率,并且提出了一种改进的布局评估模型,提高对soc芯片预测布线的准确度;同时,对于时钟驱动元件选择,文中提出了一种基于正态分布模型来达到更有效的选取。

Related Words

  1. icer
  2. ic chip
  3. ic foundry
  4. poly ic
  5. ic intercity
  6. megascale ic
  7. custom ic
  8. driver ic
  9. ic micom
  10. ic technology
  11. ic internet
  12. ic isolation technique
  13. ic lead socket
  14. ic logic control
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